SCOPS Digital sub-block PDR1 successfully held on January 9, 2025
Thales Alenia Space in France is pleased to announce the successful completion of the Preliminary Design Review 1 of the SCOPS Digital sub-block.
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Toulouse-INP paper featuring SCOPS has been accepted by the IEEE Transactions on Power Electronics journal
The acceptance of this paper, following minor revisions, is a testament to the exceptional quality of the work.
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SCOPS ASIC PDR successfully held on December 13, 2024
The consortium is pleased to announce that the Preliminary Design Review of the SCOPS ASIC was successfully completed on December 13, 2024
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PROMISE ecosystem and IPs presented to the CNES/COMET-MCE on 15th of November 2024
Thales Alenia Space in France, as a partner in the PROMISE consortium and a user of PROMISE IPs in the ongoing SCOPS design, participated in the COMET-MCE
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SCOPS ASIC ADR successfully held on October 5, 2024
The consortium is pleased to announce that the Architecture Design Review of the SCOPS ASIC was successfully completed on October 5, 2024
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Thales Alenia Space participates in RADECS 2024 and gives visibility to SCOPS
SCOPS was presented during the networking sessions to the relevant actors in the space sector with a common interest on the topic and a general agreement on the importance of the hardening of SCOPS outputs to space radiation environment effects.
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Synergie CAD participates in the IMAPS Europe 2024 and shows SCOPS
Synergie CAD was present at the IMAPS-MiNaPAD, the “Micro/Nano-Electronics Packaging & Assembly, Design and Manufacturing Forum”
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The Consortium presents a paper about SCOPS overview to AMICSA 2024
The Analog and Mixed Signal Integrated Circuits for Space Applications (AMICSA) conferences are organized every two years by the ESA Microelectronics Section
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PROMISE closure and TRL reached in the libraries
Regardless of the challenges presented by technical issues and the Covid-19 crisis, and their subsequent impacts on the program, the consortium has consistently prioritized top-tier contributions to achieve excellent results in PROMISE.
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The Consortium participates in the European Space Power Conference 2023
VTT announces the completion of the radiation hardened POR IP.
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PROMISE POR CDR Milestone successfully reached
The consortium announces Fab-Out of the PROMISE Pilot Circuit. The initiative has taken almost 3 years of design effort and 5 months of manufacturing.'
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PROMISE Pilot Circuit CDR Milestone Successfully Reached
PROMISE consortium announces the achievement of CDR completion for the PROMISE Pilot Circuit.
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PROMISE NVM CDR Milestone Successfully Reached
Imec announce the achievement of CDR completion for the embedded NVM IP. The IP is effectively designed from scratch using SONOS embedded Non-Volatile Memory. The NVM is a highly sophisticated IP containing numerous innovations at several levels of the design. Data integrity is a key goal of the design. This includes ECC features and self-calibration for the READ function over the IC’s lifetime.
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PROMISE POR CDR Milestone successfully reached
VTT announces the completion of the radiation hardened POR IP.
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PROMISE ADC CDR Milestone successfully reached
ISD announces the completion of the ADC IP. This is 6 multiplexed input (differential or single-ended), low-noise, radiation hardened ADC adequate for sampling signals ranging from DC to 40kHz.
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PROMISE DAC CDR Milestone successfully reached
ISD announces the completion of the DAC IP. This is a single channel, low-noise, radiation hardened DAC adequate for converting digital signals ranging from DC to 50kHz.
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PROMISE BGR IP CDR Milestone successfully reached
IT announces the completion of the BGR IP. The radiation hardened BGR is designed for reliable performance in space application while considering process, voltage, and temperature variations and the impact of single-event transients and total ionizing dose.
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PROMISE LO IP CDR Milestone successfully reached
IT announces the completion of the LO IP. The LO presents a 16MHz on-chip oscillator based on a frequency-locked loop (FLL) which is radiation hardened by design and intended for space applications.
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PROMISE PLL IP CDR Milestone successfully reached
ISD announces the completion of the PLL IP. An associative block that enables the PLL to operate with a reference clock from multiple sources (Crystal Oscillator, digital clock or sine wave)...
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PROMISE 1.8V LDO regulator IP CDR Milestone successfully reached
ISD announces the 500mA – 1.8V LDO design completion; it is a key block that will deliver supply to any digital core using PROMISE library.
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PROMISE LVDS IP CDR Milestone successfully reached
IMEC can announce the successful completion of its DARE radiation hardened LVDS IO simulated up to 720MHz as part of its contribution to the PROMISE project.
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PROMISE core standard cells, level shifters, IOs and IO/POC IP CDR Milestone successfully reached
IMEC can announce the successful completion of its DARE radiation hardened core standard cells, level shifters, IO with...
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Estos chips españoles crearán constelaciones de satélites europeos
La división española de Thales Alenia Space lidera la alianza europea para crear constelaciones de satélites.
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PROMISE Pilot Circuit – eFPGA integration successful!
After successful eFPGA CDR and its data package delivery, the eFPGA embedding an adder function passed its first RTL simulation in PROMISE Pilot Circuit.
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