PROMISE NVM CDR Milestone Successfully Reached

Promise –  september 23, 2022

Imec announce the achievement of CDR completion for the embedded NVM IP. The IP is effectively designed from scratch using SONOS embedded Non-Volatile Memory. The NVM is a highly sophisticated IP containing numerous innovations at several levels of the design. Data integrity is a key goal of the design. This includes ECC features and self-calibration for the READ function over the IC’s lifetime. The verification of the IP was just as challenging as the design itself and took several months. The complexity was so high that the CDR process took four lengthy review sessions.

The key parameters of the NVM IP design are given below:

Size21.15 mm2 in 180nm technology
Banks2 (one can be configured for mirroring)
Sectors32 per Bank
Pages32 per Sector
Words8 per Page
Word length32 bits
Frequency16 MHz
Dynamic Consumption50 mA target average in HV Ops and READ
Static Consumption10 uA
Goal for retention time10 years

For a fuller description, a download paper is provided on this site (see Downloads).


PROMISE eFPGA IP CDR Milestone successfully reached – the first critical enabler for ASSP