SCOPS Digital sub-block DDR successfully held on 19th of March 2025

TASF is pleased to announce the Detailed Design Review (DDR) of the SCOPS Digital sub-block, scheduled for March 19, 2025. The final netlist has been delivered to IMEC, who will manage the back-end activities. Following IMEC's contribution, TASF will conduct the post-layout verification and integrate the block into the SCOPS ASIC top level.

This block facilitates circuit configuration via an I²C interface and manages various operating modes. It includes a One-Time Programmable (OTP) block for initial circuit trimming and an additional OTP dedicated to end-user specific configurations.

• Digital sub-block floorplan